CMOS SRAM circuit design and parametric test in nano-scaled technologies - Info and Reading Options
process-aware SRAM design and test
By Pavlov, Andrei Ph. D.
"CMOS SRAM circuit design and parametric test in nano-scaled technologies" was published by Springer in 2008 - [Dordrecht], it has 193 pages and the language of the book is English.
“CMOS SRAM circuit design and parametric test in nano-scaled technologies” Metadata:
- Title: ➤ CMOS SRAM circuit design and parametric test in nano-scaled technologies
- Author: Pavlov, Andrei Ph. D.
- Language: English
- Number of Pages: 193
- Publisher: Springer
- Publish Date: 2008
- Publish Location: [Dordrecht]
“CMOS SRAM circuit design and parametric test in nano-scaled technologies” Subjects and Themes:
- Subjects: ➤ Complementary Metal oxide semiconductors - Design - Metal oxide semiconductors, Complementary - Nanoelectronics - Random access memory - Metal oxide semiconductors, complementary - Computer storage devices - Nanotechnology
Edition Specifications:
- Pagination: xvi, 193 p. :
Edition Identifiers:
- The Open Library ID: OL22565967M - OL13622189W
- Library of Congress Control Number (LCCN): 2008924192
- ISBN-13: 9781402083624 - 9781402083631
- All ISBNs: 9781402083624 - 9781402083631
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