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Transistor sizing for timing optimization of combinational digital CMOS circuits - Info and Reading Options

"Transistor sizing for timing optimization of combinational digital CMOS circuits" was published by Hartung-Gorre in 1990 - Konstanz, it has 102 pages and the language of the book is English.


“Transistor sizing for timing optimization of combinational digital CMOS circuits” Metadata:

  • Title: ➤  Transistor sizing for timing optimization of combinational digital CMOS circuits
  • Author:
  • Language: English
  • Number of Pages: 102
  • Publisher: Hartung-Gorre
  • Publish Date:
  • Publish Location: Konstanz

“Transistor sizing for timing optimization of combinational digital CMOS circuits” Subjects and Themes:

Edition Specifications:

  • Pagination: ix, 102 p. :

Edition Identifiers:

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