Performance Analysis Of CMOS Based Analog Circuit Design With PVR Variation - Info and Reading Options
By Bulletin of Electrical Engineering and Informatics
“Performance Analysis Of CMOS Based Analog Circuit Design With PVR Variation” Metadata:
- Title: ➤ Performance Analysis Of CMOS Based Analog Circuit Design With PVR Variation
- Author: ➤ Bulletin of Electrical Engineering and Informatics
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- Internet Archive ID: 10.11591eei.v12i1.4357
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"Performance Analysis Of CMOS Based Analog Circuit Design With PVR Variation" Description:
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<span class="markedContent"><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">Process, supply voltage, and temperature </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(PVT)</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">are three important factors </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">which contribute to performance variation of the </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">complementary metal</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">–</span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">oxide</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">–</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">semiconductor (CMOS) </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">based analog circuits. In this paper, CMOS </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">based analog circuit design with the PVT v</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">ariation effects are explored. The </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">effects of the PVT variation on the performance of CMOS based analog </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">circuits are introduced. The optimization of CMOS based analog circuits </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">such as </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">differential amplifier </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(DA) and two</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">-</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">stage </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">operational amplifier </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(op amp</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">) </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">circuits with PVT variations with different algorithms such as </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">cockoo search </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(CS), </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">particle swam optimization </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(PSO), hybrid CSPSO</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">,</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">and </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">differential </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">evaluation </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(DE) </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">algorithms </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">is </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">presented. Each </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">algorithm </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">is </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">implemented using the C programming language, i</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">nterfaced with Ngspice </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">circuit simulator, and tested on the </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">I</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">ntel®core™</span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">i5, 2.40 GHz processor </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">with 8 GB internal RAM using the Ubuntu </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">operating system </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr"> </span><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">(OS). The </span><br /><span style="font-size:13.8178px;font-family:sans-serif;" dir="ltr">result shows PVT variation affects the performance of CMOS circuit. </span></span>
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