"Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing." - Information and Links:

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"Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing." and the language of the book is English.


“Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.” Metadata:

  • Title: ➤  Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.
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  • Language: English

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  • Internet Archive ID: multiplevaluedpr1094528383

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"Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing." Description:

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The process of finding a guaranteed minimal solution for a multiple-valued programmable logic expression requires an exhaustive search. Exhaustive search is not very realistic because of enormous computation time required to reach a solution. One of the heuristics to reduce this computation time and provide a nearminimal solution is simulated annealing. This thesis analyzes the use of loosely-coupled, course-grained parallel systems for simulated annealing. This approach involves the use of multiple processors where interprocess communication occurs only at the beginning and end of the process. In this study, the relationship between the quality of solution, measured by the number of products and computation time, and simulated annealing parameters are investigated. A simulated annealing experiment is also investigated where two types of moves are mixed. These approaches provide improvement in both the number of product terms and computation time.

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"Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing." is available for download from The Internet Archive in "texts" format, the size of the file-s is: 88.47 Mbs, and the file-s went public at Mon Feb 01 2021.

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