Logic-timing Simulation And the Degradation Delay Model - Info and Reading Options

By Manuel J. Bellido, Jorge Juan Chico and Manuel Valencia

The cover of “Logic-timing Simulation And the Degradation Delay Model” - Open Library.

"Logic-timing Simulation And the Degradation Delay Model" is published by Imperial College Press in February 14, 2006, it has 267 pages and the language of the book is English.

“Logic-timing Simulation And the Degradation Delay Model” Metadata:

Title: ➤ Logic-timing Simulation And the Degradation Delay Model
Authors: Manuel J. BellidoJorge Juan ChicoManuel Valencia
Language: English
Number of Pages: 267
Publisher: Imperial College Press
Publish Date: February 14, 2006

“Logic-timing Simulation And the Degradation Delay Model” Subjects and Themes:

Subjects: ➤ Mathematical models - Computer simulation - Timing circuits - Integrated circuits - Very large scale integration - Complementary Metal oxide semiconductors - Electric engineering

Edition Specifications:

Format: Hardcover
Weight: 1.1 pounds
Dimensions: 8.7 x 6.2 x 1 inches

Edition Identifiers:

The Open Library ID: OL8628166M - OL19616756W
Online Computer Library Center (OCLC) ID: 64739465
Library of Congress Control Number (LCCN): 2007271541
ISBN-13: 9781860945892
ISBN-10: 1860945899
All ISBNs: 1860945899 - 9781860945892

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Snippets and Summary:

The design process of VLSI integrated circuits has different options and many stages.

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