Logic synthesis for low power VLSI designs
By Sasan Iman
"Logic synthesis for low power VLSI designs" is published by Kluwer Academic Publishers in 1998 - Boston, it has 236 pages and the language of the book is English.
“Logic synthesis for low power VLSI designs” Metadata:
- Title: ➤ Logic synthesis for low power VLSI designs
- Author: Sasan Iman
- Language: English
- Number of Pages: 236
- Publisher: Kluwer Academic Publishers
- Publish Date: 1998
- Publish Location: Boston
“Logic synthesis for low power VLSI designs” Subjects and Themes:
- Subjects: ➤ Complementary Metal oxide semiconductors - Computer-aided design - Data processing - Logic design - Low voltage integrated circuits - Metal oxide semiconductors, Complementary - Design and construction
Edition Specifications:
- Pagination: xiv, 236 p. :
Edition Identifiers:
- The Open Library ID: OL694763M - OL2732396W
- Online Computer Library Center (OCLC) ID: 37725641
- Library of Congress Control Number (LCCN): 97042097
- ISBN-13: 9780792380764
- ISBN-10: 0792380762
- All ISBNs: 0792380762 - 9780792380764
AI-generated Review of “Logic synthesis for low power VLSI designs”:
"Logic synthesis for low power VLSI designs" Description:
The Open Library:
Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-independent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints. Logic Synthesis for Low Power VLSI Designs in written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis.
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