"Implementation Of A Design For Testability Strategy Using The Genesil Silicon Compiler" - Information and Links:

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"Implementation Of A Design For Testability Strategy Using The Genesil Silicon Compiler" and the language of the book is English.


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  • Title: ➤  Implementation Of A Design For Testability Strategy Using The Genesil Silicon Compiler
  • Author:
  • Language: English

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  • Internet Archive ID: implementationof1094527087

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"Implementation Of A Design For Testability Strategy Using The Genesil Silicon Compiler" Description:

The Internet Archive:

Design for Testability (DFT) is receiving major emphasis in the very large scale integration design field due to increasing circuit complexity. The utility of the silicon compiler and its value to a system designer without extensive VLSI design experience is discussed. Two major techniques for DFT, Scanpath Design and Built-in Test Design, are implemented using the Genesil silicon compiler. The basic building block, the shiftable test latch, is described in random logic block form and parallel datapath form. Linear feedback shift registers used as random vector generators and signature analyzers are used in the Built-in Test design. An Automatic Test Generation program is used to provide a measure of fault coverage for the two DFT techniques. The appendix is a brief tutorial illustrating the use of the Genesil system's shiftable test latch in its different configurations

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"Implementation Of A Design For Testability Strategy Using The Genesil Silicon Compiler" is available for download from The Internet Archive in "texts" format, the size of the file-s is: 1059.09 Mbs, and the file-s went public at Thu Nov 19 2020.

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  • Source: Internet Archive
  • Internet Archive Link: Archive.org page
  • All Files are Available: Yes
  • Number of Files: 187
  • Number of Available Files: 187
  • Added Date: 2020-11-19 11:00:12
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