Hardware implementation of recursive fixed-point filters for minimum quantization noise - Info and Reading Options
By Carlos José de Almeida Rodrigues Rodolfo
"Hardware implementation of recursive fixed-point filters for minimum quantization noise" was published by Naval Postgraduate School in 1974 - Monterey, Calif and the language of the book is English.
“Hardware implementation of recursive fixed-point filters for minimum quantization noise” Metadata:
- Title: ➤ Hardware implementation of recursive fixed-point filters for minimum quantization noise
- Author: ➤ Carlos José de Almeida Rodrigues Rodolfo
- Language: English
- Publisher: Naval Postgraduate School
- Publish Date: 1974
- Publish Location: Monterey, Calif
“Hardware implementation of recursive fixed-point filters for minimum quantization noise” Subjects and Themes:
- Subjects: Hardware - Shift registers - Logic devices - Noise - Signal processing
Edition Specifications:
- Format: Electronic resource
- Pagination: 1 v. (various pagings)
Edition Identifiers:
- The Open Library ID: OL25398382M - OL16742609W
- Online Computer Library Center (OCLC) ID: 640088256
AI-generated Review of “Hardware implementation of recursive fixed-point filters for minimum quantization noise”:
"Hardware implementation of recursive fixed-point filters for minimum quantization noise" Description:
The Open Library:
Design and implementation of recursive digital filters with f'ixed point arithmetic using special hardware are considered in detail and applied to a mechanization of a second order filter structure with variable coefficients. Two new methods of performing quantization after arithmetic operations within a digital filter are presented: quantization after addition and quantization before multiplication. Both methods are shown applicable to hardware implementation of digital filters and offer advantages over the usual quantization after multiplication. Error bounds are derived for these two quantization schemes and compared with the results previously obtained by other authors. It is concluded that the quantization before multiplication is the most suitable for hardware filter implementation. A design modification of the presently available hardware chips in order to permit round-off or truncation before multiplication is presented.
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