Formal equivalence checking and design debugging - Info and Reading Options
By Shi-Yu Huang ( 1965 - )
“Formal equivalence checking and design debugging” Metadata:
- Title: ➤ Formal equivalence checking and design debugging
- Author: Shi-Yu Huang
“Formal equivalence checking and design debugging” Subjects and Themes:
- Subjects: ➤ Verification - Data processing - Electronic circuit design - Application specific integrated circuits - Integrated circuits - Design and construction - Electronic circuit design, data processing
Edition Identifiers:
- The Open Library ID: OL1902187W
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