Embedded Computer Systems : Architectures, Modeling, and Simulation - Info and Reading Options

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Intro -- Preface -- Organization -- Contents -- High Level Synthesis -- High-Level Synthesis of Digital Circuits from Template Haskell and SDF-AP -- 1 Introduction -- 2 Related Work -- 2.1 High-Level Synthesis Tools -- 2.2 Temporal Models for Hardware Design -- 3 SDF-AP -- 4 From Functional Description to SDF-AP -- 4.1 Template Haskell: The Toolflow -- 4.2 Conformance Relation -- 4.3 The Basic Idea of Combining SDF-AP with a Functional Language -- 4.4 The Advantages -- 4.5 The Current Limitations -- 5 Node Decomposition -- 6 Case Studies -- 6.1 Dot Product Case Study -- 6.2 Center of Mass Case Study -- 6.3 DCT2D Case Study -- 7 Conclusion -- References -- Implementing Synthetic Aperture Radar Backprojection in Chisel - A Field Report -- 1 Introduction -- 2 System Description -- 2.1 Synthetic Aperture Radar (SAR) -- 2.2 Backprojection (BP) -- 2.3 Architecture Overview -- 3 Measurements -- 3.1 Code Size -- 3.2 Transparency of Generated Code -- 4 Experience Using Chisel -- 5 Conclusion -- A Code Examples -- A.1 Chisel Code -- A.2 VHDL Code -- References -- EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis -- 1 Introduction -- 2 Related Work -- 3 Methodology -- 4 Architecture -- 4.1 PE High-Level Synthesis -- 4.2 HBM Connection -- 5 Evaluation -- 5.1 Design Complexity -- 5.2 Setup Overhead -- 5.3 Performance -- 6 Conclusion -- References -- Memory Systems -- TREAM: A Tool for Evaluating Error Resilience of Tree-Based Models Using Approximate Memory -- 1 Introduction -- 2 System Model -- 2.1 Memory and Error Model -- 2.2 Definitions for Error Resilience -- 2.3 Research Questions -- 3 TREAM: An Extension to Sklearn -- 3.1 High-Level Overview of TREAM -- 3.2 Implementation -- 4 The Effect of Bit Flips in Tree-Based Models -- 4.1 Bit Flips in Split and Feature Value -- 4.2 Bit Flips in Child Indices

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