DTIC ADA514601: High Speed Publication Subscription Brokering Through Highly Parallel Processing On Field Programmable Gate Array (FPGA) - Info and Reading Options
By Defense Technical Information Center
"DTIC ADA514601: High Speed Publication Subscription Brokering Through Highly Parallel Processing On Field Programmable Gate Array (FPGA)" and the language of the book is English.
“DTIC ADA514601: High Speed Publication Subscription Brokering Through Highly Parallel Processing On Field Programmable Gate Array (FPGA)” Metadata:
- Title: ➤ DTIC ADA514601: High Speed Publication Subscription Brokering Through Highly Parallel Processing On Field Programmable Gate Array (FPGA)
- Author: ➤ Defense Technical Information Center
- Language: English
Edition Identifiers:
- Internet Archive ID: DTIC_ADA514601
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"DTIC ADA514601: High Speed Publication Subscription Brokering Through Highly Parallel Processing On Field Programmable Gate Array (FPGA)" Description:
The Internet Archive:
Publish and subscribe approaches to information management systems reduce the complexity of these systems by loosely coupling publishers of information to subscribers of information through an intervening broker. Publications are typically written in Extensible Markup Language (XML) metadata, which a broker compares to XML Path Language (XPATH) predicates representing he subscriptions. Brokering matches result in the dissemination of a particular publication. Both the parsing of the American Standard Code for information interchange (ASCII) XML metadata and the evaluation of the logical predicates are time-consuming for programmable microprocessors. Augmenting programmable microprocessors with hardware acceleration from a Field Programmable Gate Array (FPGA) was determined here to reduce the latency and improved the throughput of this brokering. A hardware system was designed, built, and tested based upon utilizing (FPGA's) in the brokering process. Subscriptions were converted to hash values, and Look-Up-Table's (LUT's) were then synthesized on the FPGA's that corresponded to the hard value subscriptions. Ways to increase the reusability of LUT's were developed and demonstrated, which resulted in faster syntheses times, and an increase in the number of subscriptions possible on one FPGA. A software tool was developed and tested to completely facilitate automatic design generation for the FPGA syntheses. A method was developed and implemented to transfer multiple XML documents in group, which reduced the time delay in data transfer, the bottleneck in brokering, between the microprocessor and the FPGA. The brokering time of new publications was reduced to an average of 13 micron sec.
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- Internet Archive Link: Archive.org page
- All Files are Available: Yes
- Number of Files: 16
- Number of Available Files: 16
- Added Date: 2018-07-25 07:36:02
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