DTIC ADA167621: Distributed Computing For Signal Processing: Modeling Of Asynchronous Parallel Computation. Appendix C. Fault Tolerant Interconnection Networks And Image Processing Applications For The PASM Parallel Processing Systems. - Info and Reading Options
By Defense Technical Information Center
"DTIC ADA167621: Distributed Computing For Signal Processing: Modeling Of Asynchronous Parallel Computation. Appendix C. Fault Tolerant Interconnection Networks And Image Processing Applications For The PASM Parallel Processing Systems." and the language of the book is English.
“DTIC ADA167621: Distributed Computing For Signal Processing: Modeling Of Asynchronous Parallel Computation. Appendix C. Fault Tolerant Interconnection Networks And Image Processing Applications For The PASM Parallel Processing Systems.” Metadata:
- Title: ➤ DTIC ADA167621: Distributed Computing For Signal Processing: Modeling Of Asynchronous Parallel Computation. Appendix C. Fault Tolerant Interconnection Networks And Image Processing Applications For The PASM Parallel Processing Systems.
- Author: ➤ Defense Technical Information Center
- Language: English
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- Internet Archive ID: DTIC_ADA167621
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"DTIC ADA167621: Distributed Computing For Signal Processing: Modeling Of Asynchronous Parallel Computation. Appendix C. Fault Tolerant Interconnection Networks And Image Processing Applications For The PASM Parallel Processing Systems." Description:
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The demand for very high speed data processing coupled with falling hardware costs has made large-scale parallel and distributed computer systems both desirable and feasible. Two modes of parallel processing are single instruction stream-multiple data stream (SIMD) and multiple instruction stream - multiple data stream (MIMD). PASM, a partitionable SIMD/MIMD system, is a reconfigurable multimicroprocessor system being designed for image processing and pattern recognition. An important component of these systems is the interconnection network, the mechanism for communication among the computation nodes and memories. Assuring high reliability for such complex systems is a significant task. Thus, a crucial practical aspect of an interconnection network is fault tolerance. In answer to this need, the Extra Stage Cube (ESC), a fault-tolerant, multistage cube-type interconnection network, is defined. The fault tolerance of the ESC is explored for both single and multiple faults, routing tags are defined, and consideration is given to permuting data and partitioning the ESC in the presence of faults. The ESC is compared with other fault-tolerant multistage networks. Finally, reliability of the ESC and an enhanced version of it are investigated. Keywords: Theses.
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