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Toward A Formal Verification Of A Floating Point Coprocessor And Its Composition With A Central Processing Unit by Jing Pan
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1NASA Technical Reports Server (NTRS) 19910019463: Toward A Formal Verification Of A Floating-point Coprocessor And Its Composition With A Central Processing Unit
By NASA Technical Reports Server (NTRS)
Discussed here is work to formally specify and verify a floating point coprocessor based on the MC68881. The HOL verification system developed at Cambridge University was used. The coprocessor consists of two independent units: the bus interface unit used to communicate with the cpu and the arithmetic processing unit used to perform the actual calculation. Reasoning about the interaction and synchronization among processes using higher order logic is demonstrated.
“NASA Technical Reports Server (NTRS) 19910019463: Toward A Formal Verification Of A Floating-point Coprocessor And Its Composition With A Central Processing Unit” Metadata:
- Title: ➤ NASA Technical Reports Server (NTRS) 19910019463: Toward A Formal Verification Of A Floating-point Coprocessor And Its Composition With A Central Processing Unit
- Author: ➤ NASA Technical Reports Server (NTRS)
- Language: English
“NASA Technical Reports Server (NTRS) 19910019463: Toward A Formal Verification Of A Floating-point Coprocessor And Its Composition With A Central Processing Unit” Subjects and Themes:
- Subjects: ➤ NASA Technical Reports Server (NTRS) - ARITHMETIC AND LOGIC UNITS - CENTRAL PROCESSING UNITS - FLOATING POINT ARITHMETIC - PROGRAM VERIFICATION (COMPUTERS) - INTERFACES - PROVING - SYNCHRONISM - Pan, Jing - Levitt, Karl N. - Cohen, Gerald C.
Edition Identifiers:
- Internet Archive ID: NASA_NTRS_Archive_19910019463
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The book is available for download in "texts" format, the size of the file-s is: 72.53 Mbs, the file-s for this book were downloaded 64 times, the file-s went public at Tue Sep 27 2016.
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