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This document describes a set of microelectronic test structure designs for manufacturers of GaAs MMIC devices. These designs enable the dc measurement of process and device parameters that can be used to diagnose, monitor, compare, and predict the performance of the fabrication process or the devices produced. The test structure designs are embodied in a computer-aided design library known as NISTGAAS, which contains 8 types of test structures, implemented in 125 combinations of process layer and size, and based on a 2 x 6 probe-pad array. Any design, once fabricated on a wafer, can be probed using commonly available commercial parametric test system equipment. This document specifies how to implement and test each type of test structure and how to analyze the results. It also provides guidance on how to apply the set of test structures at the wafer level. Although NISTGAAS was designed for the process described in this document, it was also designed and demonstrated to be adaptable for other MMIC processes. Since NISTGAAS contains cell designs rather than a chip design, it provides a flexible test structure methodology that also provides the MMIC community with a common reference point for assessing process and device performance.