Downloads & Free Reading Options - Results

We investigate the effect of voltage-switching on task execution times and energy consumption for dual-speed hard real-time systems, and present a new approach for scheduling workloads containing periodic tasks. Our method minimizes the total energy consumed by the task set and guarantees that the deadline for every task is met. We present a mixed-integer linear programming model for the NP complete scheduling problem and solve it for moderate sized problem instances using a public-domain solver. For larger task sets, we present a novel extended-low-energy earliest-deadline-first (E-LEDF) scheduling algorithm and apply it to two real-life task sets. Our results show that energy can be conserved in embedded real-time systems using energy-aware task scheduling. We also show that switching times have a significant effect on the energy consumed in hard real-time systems.

Directed Acyclic Graph Scheduling is a technique used to implement the real-time execution of Digital Signal Processing applications on multiple- processor data-flow machines that support variable-grained parallelism. The approach used in the Navy's AN/UYS-2 Digital Signal Processor statically schedules an application graph at run-time using a First-Come-First-Served (FCFS) policy. Research by Shukla and Zaky Shukla 91 developed a new algorithm, the Revolving Cylinder(RC), to ameliorate the inherently non-deterministic output flow of the FCFS scheduling approach currently used in the system. Although the RC technique solved the problem of output-flow determinism there was no broad coverage of other current research in the very specialized field of real-time data-flow machines. This thesis reviews Revolving Cylinder analysis and then surveys, compares, and evaluates research in the field using the review as a baseline for comparison. The RC approach is best at improving the throughput and output flow determinism of a narrow range of applications on a particular architecture. Each of the other approaches offer improvements over RC scheduling in either performance as measured by throughput or through flexibility in applications handled. For each of these improvements, however, significant trade-offs are made and so improvements become relative when they affect system robustness and an ability to handle repeated execution of application graphs. The AN/UYS-2 can implement RC scheduling with a minimum of cost and no hardware reconfiguration and this makes it the best approach for short-term system. Data-flow, Digital signal processing, Real-time, Graph restructuring, Throughput.

The scheduling problem is considered to be a crucial part in the design of real-time distributed computer systems. This paper gives an extensive survey of the research performed in the area of real-time scheduling, which includes localized and centralized scheduling and allocation techniques. We classify the scheduling strategies into four basic categories: static and dynamic priorities, heuristic approaches, scheduling with precedures relations, allocation policies and strategies.

The Computer Aided Prototyping System ( CAPS ) and the Prototype System Description Language ( PSDL ) are tools that have been designed to aid in rapid prototyping. Within the framework of CAPS the Execution Support System (ESS) controls the execution of the prototype. The Static Scheduler is the component of the ESS which extracts and realizes critical timing constraints and precedence constraints for operators. The construction of a Static Scheduling Algorithm provides the foundation for handling hard real-time constraints during the execution of PSDL. The proposed work will be based on the theories of optimal sequencing through modular decomposition, as well as enumeration techniques. An optimal algorithm will provide the analyst with a definitive method for determining whether a given design can meet its hard real-time requirements.

The Computer Aided Prototyping System ( CAPS ) and the Prototype System Description Language ( PSDL ) are tools that have been designed to aid in rapid prototyping. Within the framework of CAPS the Execution Support System (ESS) controls the execution of the prototype. The Static Scheduler is the component of the ESS which extracts and realizes critical timing constraints and precedence constraints for operators. The construction of a Static Scheduling Algorithm provides the foundation for handling hard real-time constraints during the execution of PSDL. The proposed work will be based on the theories of optimal sequencing through modular decomposition, as well as enumeration techniques. An optimal algorithm will provide the analyst with a definitive method for determining whether a given design can meet its hard real-time requirements.

We consider a characterization of a real time system consisting as a set of sporadic tasks that share a set of serially reusable, single unit resources. Sporadic tasks are a generalization of periodic tasks and are well- suited for representing even driven processes. Resources are shared software objects, such as data structures. Tasks are composed of a sequence of phases. Each phase is a contiguous sequence of statements that require exclusive access to a resource. For an arbitrary instance of the model the goal is to determine if it is possible to schedule the tasks on a single processor such that: (1) each invocation of each task completes execution at or before a well-defined deadline; and (2) a resource is never accessed by more than one task simultaneously. Our work makes two contributions to the theory of real-time scheduling and resource allocation. The first is the development of an on line algorithm for sequencing a set of sporadic tasks on a uniprocessor such that the above criteria are met. The second contribution is a derivation of a set of relations on task parameters that are necessary and sufficient for a set of tasks to be schedulable.

Real time system technology traditionally developed for safety critical systems, has now been extended to support multimedia systems and virtual reality. A large number of real-time application, related to multimedia and adaptive control system, require more flexibility than classical real-time theory usually permits. This paper proposes an efficient adaptive scheduling framework in real-time systems based on period adjustment. Under this model periodic task can change their execution rates based on their importance value to keep the system underloaded. We propose Period_Adjust algorithm, which consider the tasks whose periods are bounded as well as the tasks whose periods are not bounded.

Directed Acyclic Graph Scheduling is a technique used to implement the real-time execution of Digital Signal Processing applications on multiple- processor data-flow machines that support variable-grained parallelism. The approach used in the Navy's AN/UYS-2 Digital Signal Processor statically schedules an application graph at run-time using a First-Come-First-Served (FCFS) policy. Research by Shukla and Zaky Shukla 91 developed a new algorithm, the Revolving Cylinder(RC), to ameliorate the inherently non-deterministic output flow of the FCFS scheduling approach currently used in the system. Although the RC technique solved the problem of output-flow determinism there was no broad coverage of other current research in the very specialized field of real-time data-flow machines. This thesis reviews Revolving Cylinder analysis and then surveys, compares, and evaluates research in the field using the review as a baseline for comparison. The RC approach is best at improving the throughput and output flow determinism of a narrow range of applications on a particular architecture. Each of the other approaches offer improvements over RC scheduling in either performance as measured by throughput or through flexibility in applications handled. For each of these improvements, however, significant trade-offs are made and so improvements become relative when they affect system robustness and an ability to handle repeated execution of application graphs. The AN/UYS-2 can implement RC scheduling with a minimum of cost and no hardware reconfiguration and this makes it the best approach for short-term system

The computer Aided Prototyping System (CAPS) and the Prototype System Description Language (PSDL) are tools that have been designed to aid in rapid prototyping. Within the framework of CAPS the Execution Support System (ESS) controls the execution of the prototype. The Static Scheduler is the component of the ESS which extracts and realizes critical timing constraints and precedence constraints for operators. The construction of a Static Scheduling Algorithm provides the foundation for handling hard real-time constraints during the execution of PSDL. The proposed work will be based on the theories of optimal sequencing through modular decomposition, as well as enumeration techniques. An optimal algorithm will provide the analyst with a definitive method for determining whether a given design can meet its hard real-time requirements. Keywords: Theses.

Thesis advisor(s): Amr Zaky

Thesis advisor(s): Amr Zaky

Mobile computing platforms are performing increasingly complex and computationally intensive tasks. To help lengthen useful battery life, these platforms often incorporate some form of hardware power-down that is controlled by the system software. Unfortunately, these often incur substantial transition latencies when switching between power-down and active states, making them difficult to use in time-critical embedded systems. This paper introduces a class of sprint-and-halt schedulers that attempt to maximize the energy savings of software-controlled power-down mechanisms, while simultaneously maintaining hard real-time deadline guarantees. Several different algorithms are proposed to reclaim unused processing time, defer processing, and extend power-down intervals while respecting task deadlines. Sprint-and-halt schedulers are shown to reduce energy consumption by 40-70% over typical operating parameters. For very large or small state transition latencies, simple approaches work very close to theoretical limits, but over a critical range of latencies, advanced schedulers show 10-20% energy reduction over simpler methods.

A general method for reasoning about the behavior of real-time systems is presented using hierarchical multi-state (HMS) machines. The method is based on a parametric scheduling approach that reduces the problem of verification of safety properties of concurrent systems to the solution of a set of inequalities. The method is applied to obtain a very simple solution to the problem of safety of a real-time concurrent mutual exclusion protocol that has been studied by a number of authors recently.

Self-driving cars, once constrained to closed test tracks, are beginning to drive alongside human drivers on public roads. Loss of life or property may result if the computing systems of automated vehicles fail to respond to events at the right moment. We call such systems that must satisfy precise timing constraints real-time systems. Since the 1960s, researchers have developed algorithms and analytical techniques used in the development of real-time systems; however, this body of knowledge primarily applies to traditional CPU-based platforms. Unfortunately, traditional platforms cannot meet the computational requirements of self-driving cars without exceeding the power and cost constraints of commercially viable vehicles. We argue that modern graphics processing units, or GPUs, represent a feasible alternative, but new algorithms and analytical techniques must be developed in order to integrate these uniquely constrained processors into areal-time system. The goal of the research presented in this dissertation is to discover and remedy the issues that prevent the use of GPUs in real-time systems. To overcome these issues, we design and implement a real-time multi-GPU scheduler, called GPUSync. GPUSync tightly controls access to a GPUs computational and DMA processors, enabling simultaneous use despite potential limitations in GPU hardware. GPUSync enables tasks to migrate among GPUs, allowing new classes of real-time multi-GPU computing platforms. GPUSync employs heuristics to guide scheduling decisions to improve system efficiency without risking violations in real-time constraints. GPUSync may be paired with a wide variety of common real-time CPU schedulers. GPUSync supports closed-source GPU runtimes and drivers without loss in functionality. We evaluate GPUSync with both analytical and runtime experiments. In our analytical experiments, we model and evaluate over fifty configurations of GPUSync.

Self-driving cars, once constrained to closed test tracks, are beginning to drive alongside human drivers on public roads. Loss of life or property may result if the computing systems of automated vehicles fail to respond to events at the right moment. We call such systems that must satisfy precise timing constraints real-time systems. Since the 1960s, researchers have developed algorithms and analytical techniques used in the development of real-time systems; however, this body of knowledge primarily applies to traditional CPU-based platforms. Unfortunately, traditional platforms cannot meet the computational requirements of self-driving cars without exceeding the power and cost constraints of commercially viable vehicles. We argue that modern graphics processing units, or GPUs, represent a feasible alternative, but new algorithms and analytical techniques must be developed in order to integrate these uniquely constrained processors into areal-time system. The goal of the research presented in this dissertation is to discover and remedy the issues that prevent the use of GPUs in real-time systems. To overcome these issues, we design and implement a real-time multi-GPU scheduler, called GPUSync. GPUSync tightly controls access to a GPUs computational and DMA processors, enabling simultaneous use despite potential limitations in GPU hardware. GPUSync enables tasks to migrate among GPUs, allowing new classes of real-time multi-GPU computing platforms. GPUSync employs heuristics to guide scheduling decisions to improve system efficiency without risking violations in real-time constraints. GPUSync may be paired with a wide variety of common real-time CPU schedulers. GPUSync supports closed-source GPU runtimes and drivers without loss in functionality. We evaluate GPUSync with both analytical and runtime experiments. In our analytical experiments, we model and evaluate over fifty configurations of GPUSync.

Thesis advisor, Luqi