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Being one of the most elegant sensory organs of the human body, anomalies in the retina can have serious consequences on the vision system and are indicative of specific medical conditions. Off the shelf fundus cameras are capable of acquiring high quality retinal images, yet accurate interpretation of retinal images remains a major bottleneck in the early detection of asymptomatic retinal conditions. Decades of research has led to numerous retinal image segmentation algorithms which can map blood vessels in retina images, and identify some of the most telling retina lesions. Despite this significant progress, how to derive personalized optimal parameters for automated mapping remains an open issue. In this talk, I will discuss our recent work in personalized modeling of blood vessel mapping algorithms. The technique is based on statistical fitting of selective image features to a statistical distribution, using a Sobel (or similar) edge detector as a “probe” to measure the personalized optimal threshold parameter for BV mapping. The approach allows systematic tradeoff analysis between detection sensitivity and false detection rates. The implementation of these mapping algorithms on a Pico FPGA card on a laptop achieves 30x acceleration over a CPU based implementation. We plan to utilize the very high level of parallelism offered by FPGA cluster/FPGA cards to extract region-based features for cloud-level image indexing/retrieval applications, and client crowd-based image feature processing and aggregation. ©2011 Microsoft Corporation. All rights reserved.

Being one of the most elegant sensory organs of the human body, anomalies in the retina can have serious consequences on the vision system and are indicative of specific medical conditions. Off the shelf fundus cameras are capable of acquiring high quality retinal images, yet accurate interpretation of retinal images remains a major bottleneck in the early detection of asymptomatic retinal conditions. Decades of research has led to numerous retinal image segmentation algorithms which can map blood vessels in retina images, and identify some of the most telling retina lesions. Despite this significant progress, how to derive personalized optimal parameters for automated mapping remains an open issue. In this talk, I will discuss our recent work in personalized modeling of blood vessel mapping algorithms. The technique is based on statistical fitting of selective image features to a statistical distribution, using a Sobel (or similar) edge detector as a “probe” to measure the personalized optimal threshold parameter for BV mapping. The approach allows systematic tradeoff analysis between detection sensitivity and false detection rates. The implementation of these mapping algorithms on a Pico FPGA card on a laptop achieves 30x acceleration over a CPU based implementation. We plan to utilize the very high level of parallelism offered by FPGA cluster/FPGA cards to extract region-based features for cloud-level image indexing/retrieval applications, and client crowd-based image feature processing and aggregation. ©2011 Microsoft Corporation. All rights reserved.

The development of parallel-processing image-analysis codes is generally a challenging task that requires complicated choreography of interprocessor communications. If, however, the image-analysis algorithm is embarrassingly parallel, then the development of a parallel-processing implementation of that algorithm can be a much easier task to accomplish because, by definition, there is little need for communication between the compute processes. I describe the design, implementation, and performance of a parallel-processing image-analysis application, called CRBLASTER, which does cosmic-ray rejection of CCD (charge-coupled device) images using the embarrassingly-parallel L.A.COSMIC algorithm. CRBLASTER is written in C using the high-performance computing industry standard Message Passing Interface (MPI) library. The code has been designed to be used by research scientists who are familiar with C as a parallel-processing computational framework that enables the easy development of parallel-processing image-analysis programs based on embarrassingly-parallel algorithms. The CRBLASTER source code is freely available at the official application website at the National Optical Astronomy Observatory. Removing cosmic rays from a single 800x800 pixel Hubble Space Telescope WFPC2 image takes 44 seconds with the IRAF script lacos_im.cl running on a single core of an Apple Mac Pro computer with two 2.8-GHz quad-core Intel Xeon processors. CRBLASTER is 7.4 times faster processing the same image on a single core on the same machine. Processing the same image with CRBLASTER simultaneously on all 8 cores of the same machine takes 0.875 seconds -- which is a speedup factor of 50.3 times faster than the IRAF script. A detailed analysis is presented of the performance of CRBLASTER using between 1 and 57 processors on a low-power Tilera 700-MHz 64-core TILE64 processor.

The development of parallel-processing image-analysis codes is generally a challenging task that requires complicated choreography of interprocessor communications. If, however, the image-analysis algorithm is embarrassingly parallel, then the development of a parallel-processing implementation of that algorithm can be a much easier task to accomplish because, by definition, there is little need for communication between the compute processes. I describe the design, implementation, and performance of a parallel-processing image-analysis application, called CRBLASTER, which does cosmic-ray rejection of CCD (charge-coupled device) images using the embarrassingly-parallel L.A.COSMIC algorithm. CRBLASTER is written in C using the high-performance computing industry standard Message Passing Interface (MPI) library. The code has been designed to be used by research scientists who are familiar with C as a parallel-processing computational framework that enables the easy development of parallel-processing image-analysis programs based on embarrassingly-parallel algorithms. The CRBLASTER source code is freely available at the official application website at the National Optical Astronomy Observatory. Removing cosmic rays from a single 800x800 pixel Hubble Space Telescope WFPC2 image takes 44 seconds with the IRAF script lacos_im.cl running on a single core of an Apple Mac Pro computer with two 2.8-GHz quad-core Intel Xeon processors. CRBLASTER is 7.4 times faster processing the same image on a single core on the same machine. Processing the same image with CRBLASTER simultaneously on all 8 cores of the same machine takes 0.875 seconds -- which is a speedup factor of 50.3 times faster than the IRAF script. A detailed analysis is presented of the performance of CRBLASTER using between 1 and 57 processors on a low-power Tilera 700-MHz 64-core TILE64 processor.

TRI 2 2018/2019

TRI 2 2018/2019

TRI 2 2018/2019

TRI 2 2018/2019

Available from National Technical Information Service, Springfield, Va

tilak_agerwala.mpg

We present a computational algorithm for computing short range forces between particles. The algorithm has two distinguishing features. First, it is optimized for multi-processor computers, and will use as many processors as are available. Second, it is optimized for inhomogeneous, dynamic particle distributions; for any distribution the computational load is distributed evenly to all processors, and the communication time is less than 15\% of the total run time. In this talk we present our new algorithm. We developed the program for a grand-challenge problem in cosmology, simulation of the formation of large-scale structure in the universe. This simulation, run on the Thinking Machines Corporation CM-5, uses the particle-particle/particle-mesh (PPPM) \cite{hock_east} algorithm. The particle-particle phase is computed using the algorithm we describe in this paper. We discuss this and other applications.

Many parallel data frameworks have been proposed in recent years that let sequential programs access parallel processing. To capitalize on the benefits of such frameworks, existing code must often be rewritten to the domain-specific languages that each framework supports. This rewriting-tedious and error-prone-also requires developers to choose the framework that best optimizes performance given a specific workload. This paper describes Casper, a novel compiler that automatically retargets sequential Java code for execution on Hadoop, a parallel data processing framework that implements the MapReduce paradigm. Given a sequential code fragment, Casper uses verified lifting to infer a high-level summary expressed in our program specification language that is then compiled for execution on Hadoop. We demonstrate that Casper automatically translates Java benchmarks into Hadoop. The translated results execute on average 3.3x faster than the sequential implementations and scale better, as well, to larger datasets.

A discussion on parallel processing approaches for Linux. Home Page .

A discussion on parallel processing approaches for Linux. Home Page .

This article is from Sensors (Basel, Switzerland) , volume 9 . Abstract In this study, a parallel processing method using a PC cluster and a virtual grid is proposed for the fast processing of enormous amounts of airborne laser scanning (ALS) data. The method creates a raster digital surface model (DSM) by interpolating point data with inverse distance weighting (IDW), and produces a digital terrain model (DTM) by local minimum filtering of the DSM. To make a consistent comparison of performance between sequential and parallel processing approaches, the means of dealing with boundary data and of selecting interpolation centers were controlled for each processing node in parallel approach. To test the speedup, efficiency and linearity of the proposed algorithm, actual ALS data up to 134 million points were processed with a PC cluster consisting of one master node and eight slave nodes. The results showed that parallel processing provides better performance when the computational overhead, the number of processors, and the data size become large. It was verified that the proposed algorithm is a linear time operation and that the products obtained by parallel processing are identical to those produced by sequential processing.

This article is from Bioinformatics , volume 30 . Abstract Motivation: Using high-throughput sequencing, researchers are now generating hundreds of whole-genome assays to measure various features such as transcription factor binding, histone marks, DNA methylation or RNA transcription. Displaying so much data generally leads to a confusing accumulation of plots. We describe here a multithreaded library that computes statistics on large numbers of datasets (Wiggle, BigWig, Bed, BigBed and BAM), generating statistical summaries within minutes with limited memory requirements, whether on the whole genome or on selected regions.Availability and Implementation: The code is freely available under Apache 2.0 license at www.github.com/Ensembl/WiggletoolsContact:[email protected] or [email protected]

This article is from Bioinformatics , volume 30 . Abstract Motivation: Using high-throughput sequencing, researchers are now generating hundreds of whole-genome assays to measure various features such as transcription factor binding, histone marks, DNA methylation or RNA transcription. Displaying so much data generally leads to a confusing accumulation of plots. We describe here a multithreaded library that computes statistics on large numbers of datasets (Wiggle, BigWig, Bed, BigBed and BAM), generating statistical summaries within minutes with limited memory requirements, whether on the whole genome or on selected regions.Availability and Implementation: The code is freely available under Apache 2.0 license at www.github.com/Ensembl/WiggletoolsContact:[email protected] or [email protected]

The intent of this thesis is to answer the question as to whether real time battlefield visualization, once requiring high speed UNIX workstations and specialized parallel processors, can now be now performed on relatively inexpensive off the shelf components. Alternative network topologies were implemented using 10 and 100 megabit-per-second Ethernet cards under the Linux operating system on Pentium based personal computer platforms. Network throughput, processor and video performance benchmark routines were developed to assess the hardware's potential for parallel application in a distributed environment. Code was first ported to the Linux environment. Benchmark routines were then developed and tested on various machines. Dual 200 MHz Pentium Pro processor performance exceeded the dual processor 50 MHz SUN and 40 MHz SGI UNIX workstations currently used for terrain generation by a factor of 30 using a simple ray trace algorithms as a basis for comparison. The Intel Pentium Pro personal computer proved to be a capable platform for generating six to ten frame-per-second terrain simulations. However, Fast Ethernet throughput averages only 2.5 megabytes-per-second, thereby limiting the usefulness of a distributed approach designed to increase performance by dividing workload across the network.

A new hardware approach to implementation of image processing algorithms is described. The approach is based on silicon devices which would permit an independent analog processing channel to be dedicated to evey pixel. A laminar architecture consisting of a stack of planar arrays of the device would form a two-dimensional array processor with a 2-D array of inputs located directly behind a focal plane detector array. A 2-D image data stream would propagate in neuronlike asynchronous pulse coded form through the laminar processor. Such systems would integrate image acquisition and image processing. Acquisition and processing would be performed concurrently as in natural vision systems. The research is aimed at implementation of algorithms, such as the intensity dependent summation algorithm and pyramid processing structures, which are motivated by the operation of natural vision systems. Implementation of natural vision algorithms would benefit from the use of neuronlike information coding and the laminar, 2-D parallel, vision system type architecture. Besides providing a neural network framework for implementation of natural vision algorithms, a 2-D parallel approach could eliminate the serial bottleneck of conventional processing systems. Conversion to serial format would occur only after raw intensity data has been substantially processed. An interesting challenge arises from the fact that the mathematical formulation of natural vision algorithms does not specify the means of implementation, so that hardware implementation poses intriguing questions involving vision science.

The assembling and testing of a parallel processing system is described which will allow a user to move a Digital Signal Processing (DSP) application from the design stage to the execution/analysis stage through the use of several software tools and hardware devices. The system will be used to demonstrate the feasibility of the Algorithm To Architecture Mapping Model (ATAMM) dataflow paradigm for static multiprocessor solutions of DSP applications. The individual components comprising the system are described followed by the installation procedure, research topics, and initial program development.

VMS RTL Parallel Processing Manual

DEC OpenVMS RTL Parallel Processing PLs Manual AA PV6JA TK

The problem of allocating nodes of a program graph to processors in a parallel processing architecture is considered. The algorithm is based on critical path analysis, some allocation heuristics, and the execution granularity of nodes in a program graph. These factors, and the structure of interprocessor communication network, influence the allocation. To achieve realistic estimations of the executive durations of allocations, the algorithm considers the fact that nodes in a program graph have to communicate through varying numbers of tokens. Coarse and fine granularities have been implemented, with interprocessor token-communication duration, varying from zero up to values comparable to the execution durations of individual nodes. The effect on allocation of communication network structures is demonstrated by performing allocations for crossbar (non-blocking) and star (blocking) networks. The algorithm assumes the availability of as many processors as it needs for the optimal allocation of any program graph. Hence, the focus of allocation has been on varying token-communication durations rather than varying the number of processors. The algorithm always utilizes as many processors as necessary for the optimal allocation of any program graph, depending upon granularity and characteristics of the interprocessor communication network.

EASY-FLOW, a very high-level data flow language, is introduced for the purpose of adapting programs written in a conventional high-level language to a parallel environment. The level of parallelism provided is of the large-grained variety in which parallel activities take place between subprograms or processes. A program written in EASY-FLOW is a set of subprogram calls as units, structured by iteration, branching, and distribution constructs. A data flow graph may be deduced from an EASY-FLOW program.

A Message-Passing Kernel (MPK) for the Hypercluster parallel-processing test bed is described. The Hypercluster is being developed at the NASA Lewis Research Center to support investigations of parallel algorithms and architectures for computational fluid and structural mechanics applications. The Hypercluster resembles the hypercube architecture except that each node consists of multiple processors communicating through shared memory. The MPK efficiently routes information through the Hypercluster, using a message-passing protocol when necessary and faster shared-memory communication whenever possible. The MPK also interfaces all of the processors with the Hypercluster operating system (HYCLOPS), which runs on a Front-End Processor (FEP). This approach distributes many of the I/O tasks to the Hypercluster processors and eliminates the need for a separate I/O support program on the FEP.

The report summarizes the work performed at the University of Notre Dame under a NASA grant from July 15, 1995 through July 14, 1996. Researchers involved in the work included the PI, Dr. Peter M. Kogge, and three graduate students under his direction in the Computer Science and Engineering Department: Stephen Dartt, Costin Iancu, and Lakshmi Narayanaswany. The organization of this report is as follows. Section 2 is a summary of the problem addressed by this work. Section 3 is a summary of the project's objectives and approach. Section 4 summarizes PIM technology briefly. Section 5 overviews the main results of the work. Section 6 then discusses the importance of the results and future directions. Also attached to this report are copies of several technical reports and publications whose contents directly reflect results developed during this study.

The objective of this research is to provide an interconnect design synthesis methodology which facilitates a modular design approach without compromising the global performance. The main tasks of this effort will be the development of the theory for optimal interconnect synthesis from a high-level specification, with emphasis on testability and fault-tolerance asynchronous interface among concurrent computing hardware objects, and the application of this design methodology to physical implementations of parallel processing systems.

Many of today's scientific and industrial problems require enormous computing power. Since circuit switching speeds are reaching fundamental limits, avenues to speed up computations other than that using faster components are being explored. One such avenue is the use of parallelism. PASM is a dynamically reconfigurable SIMD/MIMD parallel processing system with up to 1,024 processing elements (PEs). It can be dynamically reconfigured to work as one or more SIMD (single instruction stream - multiple data stream) and/or MIMD (multiple instruction stream - multiple data stream) machines. A prototype with 30 MC68010 microprocessors, including 16 PEs in the computational engine, is being designed and constructed. The design of the prototype hardware is described, as well as the design tradeoffs that were made. Extending the the current prototype by the addition of a Network Interface Unit (NIU) to each PE is proposed. Such an NIU significantly enhances interprocessor communication by offloading communication overhead from the PE's main CPU. One way to extend the prototype design to a system with 1,024 processors in the computational engine is presented. The powerful reconfiguration capabilities of PASM can be fully utilized only if all tradeoffs influencing reconfiguration are known. Keywords: PASM(Partitionable SIMD/MIMD machine, MIMD(Multiple Instruction Stream - Multiple Data Stream).

The purpose of this study was to evaluate the parallel processing impact of MIMD (Multiple-Instruction Multiple-Data Path) computers on Flight Simulation Software. Basic mathematical functions and arithmetic expressions from typical Flight Simulation Software were selected and run on a MIMD computer to evaluate the improvement in execution time that results from the parallel architecture of this type of computer. Recommendations as to the types of tasks which are optimally suitable for this computer architecture are made, together with the improvement in execution speed to be expected. (Author)

The purpose of this study was to evaluate the parallel processing impact of MIMD (Multiple-Instruction Multiple-Data Path) computers on Flight Simulation Software. Basic mathematical functions and arithmetic expressions from typical Flight Simulation Software were selected and run on a MIMD computer to evaluate the improvement in execution time that results from the parallel architecture of this type of computer. Recommendations as to the types of tasks which are optimally suitable for this computer architecture are made, together with the improvement in execution speed to be expected. (Author)

The research in this paper focuses on the I/O problem associated with a parallel application writing to a single physical disk. Included in our research are the original ideas that led to the first version of the parallel software, subsequent versions of the software derived from lessons learned from benchmark results, and speedup results of each version. The underlying purpose of this software is to process hydrographic data having a complicated, multi-tiered format. The data processing involves reading tens to hundreds of files containing raw data, filtering out extraneous data values, and writing the filtered data to a single file used in additional processing. The problem is not computationally intensive, but bound by the system's file writing capability. Results show that the more responsible the software was for organizing the data before writing, the better the speedup. The critical factor for writing data efficiently involved the limitation of writing data over a single I/O controller. Our parallel software has fantastic utility where system specifications do not allow for the use of parallel file systems, or writing data over multiple I/O controllers.

Network based parallel computing using personal computers is currently a popular choice for concurrent scientific computing. This work evaluates the capabilities and the performance of the AFIT Bimodal Cluster (ABC); a heterogeneous cluster of PCs connected by switched fast Ethernet and using MPICH 1.1 for interprocess communication for parallel digital signal processing using Space Time Adaptive Processing (STAP) as the case study. The MITRE RT_STAP Benchmark version 1.1 is ported and executed on the ABC, as well as on a cluster of six Sun SPARC workstations connected by a Myrinet network (the AFIT NOW), and on a IBM SP for comparison. Modifications to the RT_STAP benchmark source code are done to accommodate the BLAS routines obtained from the ASCI Red project and the FFTPACK from the Netlib repository. Comparative performance analysis of the original and modified versions of the benchmarks executed on the ABC running the LINUX OS is performed, and shows improvements in the sustained Gflop/sec rates. Inter-platform comparative analysis demonstrates ABC's superior computation rates, but also reveals limited machine scalability as a result of severe communication overheads imposed by RT_STAP cornerturn operations. Analysis of experimental data indicates that ABC outperforms AFIT NOW but needs interconnection network improvements to be globally competitive to MPPs such as the IBM SP.

Network based parallel computing using personal computers is currently a popular choice for concurrent scientific computing. This work evaluates the capabilities and the performance of the AFIT Bimodal Cluster (ABC); a heterogeneous cluster of PCs connected by switched fast Ethernet and using MPICH 1.1 for interprocess communication for parallel digital signal processing using Space Time Adaptive Processing (STAP) as the case study. The MITRE RT_STAP Benchmark version 1.1 is ported and executed on the ABC, as well as on a cluster of six Sun SPARC workstations connected by a Myrinet network (the AFIT NOW), and on a IBM SP for comparison. Modifications to the RT_STAP benchmark source code are done to accommodate the BLAS routines obtained from the ASCI Red project and the FFTPACK from the Netlib repository. Comparative performance analysis of the original and modified versions of the benchmarks executed on the ABC running the LINUX OS is performed, and shows improvements in the sustained Gflop/sec rates. Inter-platform comparative analysis demonstrates ABC's superior computation rates, but also reveals limited machine scalability as a result of severe communication overheads imposed by RT_STAP cornerturn operations. Analysis of experimental data indicates that ABC outperforms AFIT NOW but needs interconnection network improvements to be globally competitive to MPPs such as the IBM SP.

This paper addresses the reservoir design problem in the context of delay-based reservoir computers for multidimensional input signals, parallel architectures, and real-time multitasking. First, an approximating reservoir model is presented in those frameworks that provides an explicit functional link between the reservoir parameters and architecture and its performance in the execution of a specific task. Second, the inference properties of the ridge regression estimator in the multivariate context is used to assess the impact of finite sample training on the decrease of the reservoir capacity. Finally, an empirical study is conducted that shows the adequacy of the theoretical results with the empirical performances exhibited by various reservoir architectures in the execution of several nonlinear tasks with multidimensional inputs. Our results confirm the robustness properties of the parallel reservoir architecture with respect to task misspecification and parameter choice that had already been documented in the literature.

The numerical solution of many problems in continuum dynamics is seriously limited by the computation rates attainable on computers with serial architecture. Parallel processing machines can achieve much higher rates. However, applying additional processors to a calculation is only part of the solution. This research was undertaken to develop parallel algorithms for explicit and implicit, Lagrangian and Eulerian finite difference schemes for computational continuum dynamics in one spatial dimension. First, the explicit conservation equations in the Lagrangian reference frame were readily reformulated for concurrent processing. Second, an implicit solution was derived for these equations. This is important because it yields unconditional stability. The parallelism is achieved bia a block implicit numerical scheme. Third, a rezoning algorithm was employed with each Lagrangian integration stem to transform the mesh back to the Eulerian reference frame. The algorithmic development path lead to a parallelization of the processing in blocks of the finite difference zones. AWt each step of this research project, the derived numerical methods provided effective algorithms for exploiting the architectural advantages of the HEP H1000 (Heterogeneous Element Processor) computer. The computational timing data shows significant speed-up with the number of processes. (Author)

Evidence has supported the idea that readers lexically process words serially (one at a time), but evidence by Mirault et al. (2018) has demonstrated a transposed word effect. This effect is where readers have difficulty deciding that sentences such as “do love you me? “are ungrammatical, in which the transposition of two adjacent words (i.e., love you) would form a grammatical sentence, compared to sentences in which the transposition of two words does not result in grammaticality (e.g. the cat white was slowly). This has been taken as evidence for the parallel lexical processing of multiple words simultaneously. Evidence has also shown that the transposed word effect can be attributed to a combination of noisy bottom-up word position coding and top-down syntactic constraints. This effect can be interpreted within serial, as opposed to parallel, reading models. The present study will examine the transposed word effect by varying type of processing for which each of the two transposed words will be presented. We aim to replicate the previous findings by presenting words presented one word following the previous word in a sentence, as opposed to on word being presented at a time. In this experiment, we manipulate sequence type. Thus, we expected that the transposed word effect in visual parallel paradigm to be replicated such that transposed words are responded to more slowly and are more error prone than control words. However, the main focus is on accuracy. In addition, we aim to compare the results of visual transposed word parallel processing with that of visual transposed word serial processing. This is to assess whether the transposed word effect occurs as a result of the integration of word n+1 may begin before the integration of word n is complete, which may allow the transposed word effect to occur (Huang & Staub, 2021) . As a result, the findings we observed may be more likely to ensue, as there is a higher likelihood that word n would not complete when the integration of word n+1 began when all words are presented in a parallel, as opposed to serial manner. If this is the case, then the transposed word effect should be numerically larger in parallel than serial.

The study undertook to examine the utility of cellular automata in physical science calculations, especially in fluid dynamics. The scope of the study was expanded to include several related topics which would be of some interest to our sponsors. These include: (1) a comparison of cellular automata (CA) techniques to conventional methods of solving the partial differential equations of fluid dynamics or other physical situations; and (2) the utility and status of using parallel or concurrent processing machines for doing either CA or conventional fluids calculations. Keywords: Impressiable fluid algorithmns; Octogonal quasilattice.

MultiScheme is a fully operational parallel-programming system based upon the Scheme dialect of Lisp. Like its Lisp ancestors, MultiScheme provides a conducive environment for prototyping and testing new linguistic structures and programming methodologies. MultiScheme supports a diverse community of users who have a wide range of interests in parallel programming. MultiScheme's flexible support for system-based experiments in parallel processing has enabled it to serve as a development vehicle for university and industrial research. At the same time, MultiScheme is sufficiently robust, and supports a sufficiently wide range of parallel-processing applications, that it has become the base for a commercial product, the Butterfly Lisp System produced by BBN Advanced Computers, Inc.

This effort produced an approach for developing software for parallel processing systems based on the parallel object-oriented functional computational model (PROOF). A benefit of this approach is that it allows the software development to be separated from architecture-dependent issues to a great degree. For example, the programmers do not need to be concerned with issues such as synchronization, parallelization, or the topology of the parallel processing system when they address objects in the system. The object-oriented paradigm reflects the parallel structure of the problem space and can represent inherently concurrent behavior. This approach is suitable for MIMD machines and should result in software that is more understandable, modifiable and portable over a variety of parallel computer architectures.

A set of computer aided software engineering (CASE) tools for the software development framework for parallel processing systems based on the Parallel Object Oriented Functional computation model (PROOF) toward the automation of object oriented software development for parallel processing systems is presented. An object oriented analysis tool has been developed to identify and express parallelism in the problem statement. We have developed a communication estimation tool to estimate the communication among objects, and a clustering tool to partition the objects in groups so that the intergroup communication is reduced and concurrency with specified user requirements is realized. The parallelism analysis tool further explores potential parallelism by analyzing the invocation relations and data flow among objects. The PROOF/L back end translator is extended to support clustering and dynamic allocation features in order to achieve better performance on a workstation cluster. The software effort using our approach can be greatly reduced due to implicit synchronization and communication, the user friendly graphical interfaces of the CASE tools, the automated object oriented analysis and parallelism analysis. The performance of software developed using our approach can be improved due to the integration of the object clustering algorithm, the parallelism analysis tool and the extended back end translator.

A parallel (multiprocessor) system processing fault-tolerant programs was previously developed. The system performance is evaluated in this paper, using an analytic approach based on stochastic models. The analysis confirms the high effectiveness of a parallel system, under all practical circumstances, in reducing the program execution time increase due to run-time validation and system state saving. It also shows how the system performance is affected by various program characteristics.

This report summarizes research conducted during the period May 1983 - April 1985. Abstracts of 20 reports are given in chronological order. This bibliography deals with the following topics: a) Parallel algorithms and architectures for processing images and data structures derived from images; b) Interprocessor communication for parallel processing; c) Knowledge-based image understanding; and, d) Image modeling. (Author)

A region may be represented by specifying the curves that bound it. When p processors are available, typical operations on regions so represented can be performed much faster than using a single processor. This paper presents parallel algorithms to determine properties of regions, such as area; to perform operations on regions, such as union and intersection; to determine if a point lies inside a region; and to determine whether a given digital curve could be the boundary of a region. Some of the algorithms involve sorting, the time complexity of which depends on the particular model of parallel computation used. (Author)

This report compiles the results of army research in the area of modeling asynchronous parallel architectures and computation for applications in the areas of digital image and signal processing. The work can be broadly divided into three areas: (1) Case studies of parallel image processing algorithms and tasks, the objective of which is to study the interaction of parallel processes and parallel architectures; (2) Modeling of interconnection networks and (3) Aspects of the problem of modeling parallel processes and parallel architectures.

Two methods are used to speed up the execution of a computational task. One is new technology development and the other is the exploitation of parallelism in the computation. To take an advantage of the parallelism in a task requires the utilization of parallel computer architectures. At a certain high level of abstraction a parallel computer system is represented as a graph where the nodes represent processors, memories, or other devices, and the edges represent the communication links. In this thesis the following problems of parallel processing are studied. First is a theoretical study of topological properties of interconnection networks. Second is a case study of a network design for a real-time system. Lastly, the use of SIMD(Single Instruction Stream Multiple Data Stream) networks for performing 'shuffles'. A general model that can be used to describe networks and systems with arbitrary topologies is developed. Based upon the of morphism of groups, the concept of morphism of systems is developed. The morphism of systems is called quasimorphism and allows a method of comparison between topologically arbitrary parallel computer systems. The quasimorphism is used to study the emulation of one system by another.

Host plus multiple array processor architecture is demonstrated to yield a modular, fast, and cost-effective system for radar processing. Software methodology for programming such a system is developed. Parallel processing with pipelined data flow among the host, array processors, and discs is implemented. Theoretical analysis of performance is made and experimentally verified. The broad class of problems to which the architecture and methodology can be applied is indicated.

A 1-bit serial processor designed for a parallel computer architecture is described. This processor is used to develop a massively parallel computational engine, with a single instruction-multiple data (SIMD) architecture. The computer is simulated and tested to verify its operation and to measure its performance for further development.

A study was conducted to inquire into serial and parallel relations of information processing. A hypothesis was derived from earlier studies, and it was assumed that serial processing exceeds parallel processing in time. A figure-type test was constructed with two items. The reliability of the measure was examined with the coefficient of alienation against a random criterion. Validity of the measure was examined with the goodness of fit of the relation structures. The subjects were 96 secondary comprehensive school students in Finland, and they were divided into 13-, 14-, 15-, and 16-year-old age groups. The analysis of processing consisted of a base line definition and the eigensystem solutions in each age group and between them. The results indicate a slight corroboration of the hypothesis with some exceptions. Thus the process of serial and parallel processing emphasizes the development of the control part or of the serial processing during time. A didactical process application was shown from the basis of the findings, and some shortcomings of educational theory construction are expressed. (Contains four tables, two figures, and two references.) (Author/SLD)

Many computing tasks involve heavy mathematical calculations, or analyzing large amounts of data. These operations can take a long time to complete using only one computer. Networks such as the Internet provide many computers with the ability to communicate with each other. Parallel or distributed computing takes advantage of these networked computers by arranging them to work together on a problem, thereby reducing the time needed to obtain the solution. The drawback to using a network of computers to solve a problem is the time wasted in communicating between the various hosts. The application of distributed computing techniques to a space environment or to use over a satellite network would therefore be limited by the amount of time needed to send data across the network, which would typically take much longer than on a terrestrial network. This experiment shows how much faster a large job can be performed by adding more computers to the task, what role communications time plays in the total execution time, and the impact a long-delay network has on a distributed computing system.