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Multiple Valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing. by Yildirim%2c Cem.%3bbutler%2c Jon T.

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1DTIC ADA260379: Multiple-Valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing

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The process of finding a guaranteed minimal solution for a multiple- valued programmable logic expression requires an exhaustive search. Exhaustive search is not very realistic because of enormous computation time required to reach a solution. One of the heuristics to reduce this computation time and provide a near-minimal solution is simulated annealing. This thesis analyzes the use of loosely-coupled, course-grained parallel systems for simulated annealing. This approach involves the use of multiple processors where interprocess communication occurs only at the beginning and end of the process. In this study, the relationship between the quality of solution, measured by the number of products and computation time, and simulated annealing parameters are investigated. A simulated annealing experiment is also investigated where two types of moves are mixed. These approaches provide improvement in both the number of product terms and computation time.

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  • Title: ➤  DTIC ADA260379: Multiple-Valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing
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  • Language: English

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The book is available for download in "texts" format, the size of the file-s is: 25.61 Mbs, the file-s for this book were downloaded 110 times, the file-s went public at Fri Mar 09 2018.

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2Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.

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The process of finding a guaranteed minimal solution for a multiple- valued programmable logic expression requires an exhaustive search. Exhaustive search is not very realistic because of enormous computation time required to reach a solution. One of the heuristics to reduce this computation time and provide a near-minimal solution is simulated annealing. This thesis analyzes the use of loosely-coupled, course-grained parallel systems for simulated annealing. This approach involves the use of multiple processors where interprocess communication occurs only at the beginning and end of the process. In this study, the relationship between the quality of solution, measured by the number of products and computation time, and simulated annealing parameters are investigated. A simulated annealing experiment is also investigated where two types of moves are mixed. These approaches provide improvement in both the number of product terms and computation time.

“Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.” Metadata:

  • Title: ➤  Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.
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  • Language: en_US

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The book is available for download in "texts" format, the size of the file-s is: 77.83 Mbs, the file-s for this book were downloaded 185 times, the file-s went public at Mon Dec 10 2012.

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3Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.

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Thesis advisor, Jon T. Butler

“Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.” Metadata:

  • Title: ➤  Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.
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  • Language: en_US,eng

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The book is available for download in "texts" format, the size of the file-s is: 42.60 Mbs, the file-s for this book were downloaded 137 times, the file-s went public at Wed Oct 07 2015.

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4Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.

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The process of finding a guaranteed minimal solution for a multiple-valued programmable logic expression requires an exhaustive search. Exhaustive search is not very realistic because of enormous computation time required to reach a solution. One of the heuristics to reduce this computation time and provide a nearminimal solution is simulated annealing. This thesis analyzes the use of loosely-coupled, course-grained parallel systems for simulated annealing. This approach involves the use of multiple processors where interprocess communication occurs only at the beginning and end of the process. In this study, the relationship between the quality of solution, measured by the number of products and computation time, and simulated annealing parameters are investigated. A simulated annealing experiment is also investigated where two types of moves are mixed. These approaches provide improvement in both the number of product terms and computation time.

“Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.” Metadata:

  • Title: ➤  Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.
  • Author:
  • Language: English

“Multiple-valued Programmable Logic Array Minimization By Concurrent Multiple And Mixed Simulated Annealing.” Subjects and Themes:

Edition Identifiers:

Downloads Information:

The book is available for download in "texts" format, the size of the file-s is: 88.47 Mbs, the file-s for this book were downloaded 81 times, the file-s went public at Mon Feb 01 2021.

Available formats:
Archive BitTorrent - DjVuTXT - Djvu XML - Item Tile - Metadata - OCR Page Index - OCR Search Text - Page Numbers JSON - Scandata - Single Page Processed JP2 ZIP - Text PDF - chOCR - hOCR -

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