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Interpreter Composition Issues In The Formal Verification Of A Processor Memory Module by David A. Fura
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1NASA Technical Reports Server (NTRS) 19940028269: Interpreter Composition Issues In The Formal Verification Of A Processor-memory Module
By NASA Technical Reports Server (NTRS)
This report describes interpreter composition techniques suitable for the formal specification and verification of a processor-memory module using the HOL theorem proving system. The processor-memory module is a multichip subsystem within a fault-tolerant embedded system under development within the Boeing Defense and Space Group. Modeling and verification methods were developed that permit provably secure composition at the transaction-level of specification, significantly reducing the complexity of the hierarchical verification of the system.
“NASA Technical Reports Server (NTRS) 19940028269: Interpreter Composition Issues In The Formal Verification Of A Processor-memory Module” Metadata:
- Title: ➤ NASA Technical Reports Server (NTRS) 19940028269: Interpreter Composition Issues In The Formal Verification Of A Processor-memory Module
- Author: ➤ NASA Technical Reports Server (NTRS)
- Language: English
“NASA Technical Reports Server (NTRS) 19940028269: Interpreter Composition Issues In The Formal Verification Of A Processor-memory Module” Subjects and Themes:
- Subjects: ➤ NASA Technical Reports Server (NTRS) - CIRCUIT RELIABILITY - EMBEDDED COMPUTER SYSTEMS - FAULT TOLERANCE - MEMORY (COMPUTERS) - MICROPROCESSORS - THEOREM PROVING - COMPUTER DESIGN - COMPUTER PROGRAMS - MATHEMATICAL LOGIC - SYSTEMS ANALYSIS - Fura, David A. - Cohen, Gerald C.
Edition Identifiers:
- Internet Archive ID: NASA_NTRS_Archive_19940028269
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The book is available for download in "texts" format, the size of the file-s is: 79.51 Mbs, the file-s for this book were downloaded 72 times, the file-s went public at Fri Oct 07 2016.
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