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This thesis evaluates the usefulness of the SRC-6E reconfigurable computing system, a particular kind of specialized computer, for the radar-signal processing application of generating false radar images. It documents the process of creating and importing VHDL code to configure the user definable logic on the SRC-6E, building on previous work for the SRC-6E. Data from alternative computational approaches to the same problem are compared to determine the effectiveness of a SRC-6E solution. The result show that the SRC-6E provides no advantage until the task is made significantly complex; for this application, this was at greater than 64 range bins. This supports the hypothesis that the algorithm requires too muon initialization effort to take much advantage of the parallel processing and pipelining of toe SRC-6E. An evaluation of the SRC-6E difficulty of use is conducted, including a discussion of required skills, experience and development times.