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Thesis advisor, Douglas J. Fouts

This thesis describes the design, construction, and programming of a microcontroller- based testbench suitable for radiation testing microelectronic integrated circuits. It will be used to test circuits fabricated using the Low Temperature Gallium Arsenide (LT GaAs) fabrication process developed by the Naval Postgraduate School and the Naval Research Laboratory. The testbench will be used to test for sensitivity to Single Event Upsets (changes in logic level due to impact by high energy ions). Due to the spurious radiation around the particle accelerator, it will be remotely operated via a serial communication port. Radiation hardened components will eventually be used throughout, although for cost- savings, non-radiation hardened components are used in the initial design described here. The test bench is built around the Intel 8%C51 four-port microcontroller. As part of this research, it will be programmed to test two memory chips, one manufactured by Motorola Inc. and one by Vitesse Semiconductor Corporation. The Motorola chip requires that a special chip carrier with logic translation and output drivers be designed prior to testing

This thesis describes the design, construction, and programming of a microcontroller- based testbench suitable for radiation testing microelectronic integrated circuits. It will be used to test circuits fabricated using the Low Temperature Gallium Arsenide (LT GaAs) fabrication process developed by the Naval Postgraduate School and the Naval Research Laboratory. The testbench will be used to test for sensitivity to Single Event Upsets (changes in logic level due to impact by high energy ions). Due to the spurious radiation around the particle accelerator, it will be remotely operated via a serial communication port. Radiation hardened components will eventually be used throughout, although for cost- savings, non-radiation hardened components are used in the initial design described here. The test bench is built around the Intel 8%C51 four-port microcontroller. As part of this research, it will be programmed to test two memory chips, one manufactured by Motorola Inc. and one by Vitesse Semiconductor Corporation. The Motorola chip requires that a special chip carrier with logic translation and output drivers be designed prior to testing

This thesis describes the design, construction, and programming of a microcontroller- based testbench suitable for radiation testing microelectronic integrated circuits. It will be used to test circuits fabricated using the Low Temperature Gallium Arsenide (LT GaAs) fabrication process developed by the Naval Postgraduate School and the Naval Research Laboratory. The testbench will be used to test for sensitivity to Single Event Upsets (changes in logic level due to impact by high energy ions). Due to the spurious radiation around the particle accelerator, it will be remotely operated via a serial communication port. Radiation hardened components will eventually be used throughout, although for cost- savings, non-radiation hardened components are used in the initial design described here. The test bench is built around the Intel 8%C51 four-port microcontroller. As part of this research, it will be programmed to test two memory chips, one manufactured by Motorola Inc. and one by Vitesse Semiconductor Corporation. The Motorola chip requires that a special chip carrier with logic translation and output drivers be designed prior to testing.