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Partial orders are used extensively for modeling and analyzing concurrent computations. In this paper, we define two properties of partially ordered sets: width-extensibility and interleaving-consistency, and show that a partial order can be a valid state based model: (1) of some synchronous concurrent computation iff it is width-extensible, and (2) of some asynchronous concurrent computation iff it is width-extensible and interleaving-consistent. We also show a duality between the event based and state based models of concurrent computations, and give algorithms to convert models between the two domains. When applied to the problem of checkpointing, our theory leads to a better understanding of some existing results and algorithms in the field. It also leads to efficient detection algorithms for predicates whose evaluation requires knowledge of states from all the processes in the system.

The work of several graduate students which relate to the NASA grant is briefly summarized. One student has worked on a detailed analysis of the so-called ijk forms of Gaussian elemination and Cholesky factorization on concurrent processors. Another student has worked on the vectorization of the incomplete Cholesky conjugate method on the CYBER 205. Two more students implemented various versions of Gaussian elimination and Cholesky factorization on the FLEX/32.

Book Source: Digital Library of India Item 2015.193517 dc.contributor.author: Salil Durani dc.date.accessioned: 2015-07-08T02:52:16Z dc.date.available: 2015-07-08T02:52:16Z dc.date.digitalpublicationdate: 2005-09-27 dc.identifier.barcode: 1990010091840 dc.identifier.origpath: /rawdataupload/upload/0091/840 dc.identifier.copyno: 1 dc.identifier.uri: http://www.new.dli.ernet.in/handle/2015/193517 dc.description.scannerno: 14 dc.description.scanningcentre: IIIT, Allahabad dc.description.main: 1 dc.description.tagged: 0 dc.description.totalpages: 39 dc.format.mimetype: application/pdf dc.language.iso: English dc.publisher: Indian Institute Of Technology Kanpur dc.rights: Out_of_copyright dc.source.library: Indian Institute Of Technology Kanpur dc.subject.classification: Technology dc.subject.classification: Engineering. Technology In General dc.subject.classification: Computer Science dc.title: Communicating Automata -a Model For Concurrent Computations

This thesis proposes operational specifications for a Structure Memory (SM). A specialized hardware component of a general-purpose computing system, the SM would directly execute operations on dynamically structured data stored in it. The computing system is assumed capable of exploiting program concurrency at the machine-instruction level. Concurrency among a set of program instructions which all examine or modify the same structure must be carefully controlled, if the program is to be determinate. The first of two major contributions of the thesis is a combination hardware/software discipline which affords maximal concurrency consistent with determinacy. Its key feature is that the SM will not return a given pointer until certain previously-returned pointers to the same structure are no longer available as operands. The second major contribution is the entry-execution model of concurrent computation. Reversing the emphasis of most previous work, this model concentrates on the operations performed by instructions, while abstracting away details of how operands are passed among them and how their execution order is determined. The essence of structure operators, that the result of an execution of one may depend on the input to previous executions of that and other operators, is given a natural expression in the new model. A proof of sufficient conditions for determinacy is made more generally applicable through use of the entry-execution model as its medium.

This paper describes the conceptual model, specification method, and visualization methodology for PavaneNa visualization environment concerned with exploring, monitoring, and presenting concurrent computations. The underlying visualization model is declarative in the sense that visualization is treated as a mapping from program states to a three-dimensional world of geometric objects. The latter is rendered in full color and may be examined freely by a viewer who is allowed to navigate through the geometric world. The state-to-geometry mapping is defined as a composition of several simpler mappings. The choice is determined by methodological and architectural considerations. This paper shows how this decomposition was molded by two methodological objectives: (1) the desire to visually capture abstract formal properties of programs (e.g., safety and progress) rather than operational details and (2) the need to support complex animations of atomic computational events. All mappings are specified using a rule-based notation; rules may be added, deleted, and modified at any time during the visualization. An algorithm for termination detection in diffusing computations is used to illustrate the specification method and to demonstrate its conceptual elegance and flexibility. A concurrent version of a popular artificial intelligence program provides a vehicle for demonstrating how we derive graphical representations and animation scenarios from key formal properties of the program, i.e., from those safety and progress assertions about the program which turn out to be important in verifying its correctness.