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An Engineering Methodology For Implementing And Testing Vlsi Circuits by Corliss%2c Walter F.%2c Ii
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1DTIC ADA208128: An Engineering Methodology For Implementing And Testing VLSI (Very Large Scale Integrated) Circuits
By Defense Technical Information Center
The engineering methodology for producing a fully tested VLSI chip from a design layout is presented. A 16-bit correlator, NPS CORN88, that was previously designed, was used as a vehicle to demonstrate this methodology. The study of the design and simulation tools, MAGIC and MOSSIM II, was the focus of the design and validation process. The design was then implemented and the chip was fabricated by MOSIS. This fabricated chip was then used to develop a testing methodology for using the digital test facilities at NPS. NPS CORN88 was the first full custom VLSI chip, designed at NPS, to be tested with the NPS digital analysis system, Tektronix DAS 9100 series tester. The capabilities and limitations of these test facilities are examined within this thesis. NPS CORN88 test results are included to demonstrate the capabilities of the digital test system. A translator, MOS2DAS, was developed to convert the MOSSIM II simulation program to the input files required by the DAS 9100 device verification software, 91DVS. Finally, a tutorial for using the digital test facilities, including the DAS 9100 and associated support equipments, is included as an appendix.
“DTIC ADA208128: An Engineering Methodology For Implementing And Testing VLSI (Very Large Scale Integrated) Circuits” Metadata:
- Title: ➤ DTIC ADA208128: An Engineering Methodology For Implementing And Testing VLSI (Very Large Scale Integrated) Circuits
- Author: ➤ Defense Technical Information Center
- Language: English
“DTIC ADA208128: An Engineering Methodology For Implementing And Testing VLSI (Very Large Scale Integrated) Circuits” Subjects and Themes:
- Subjects: ➤ DTIC Archive - Corliss, II, Walter F - NAVAL POSTGRADUATE SCHOOL MONTEREY CA - *COMPUTER FILES - *ENGINEERING - *DIGITAL SYSTEMS - *SIMULATION - VALIDATION - TEST FACILITIES - INPUT - TEST AND EVALUATION - METHODOLOGY
Edition Identifiers:
- Internet Archive ID: DTIC_ADA208128
Downloads Information:
The book is available for download in "texts" format, the size of the file-s is: 68.85 Mbs, the file-s for this book were downloaded 86 times, the file-s went public at Thu Feb 22 2018.
Available formats:
Abbyy GZ - Archive BitTorrent - DjVuTXT - Djvu XML - Item Tile - Metadata - OCR Page Index - OCR Search Text - Page Numbers JSON - Scandata - Single Page Processed JP2 ZIP - Text PDF - chOCR - hOCR -
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2An Engineering Methodology For Implementing And Testing VLSI Circuits
By Corliss, Walter F., II
The engineering methodology for producing a fully tested VLSI chip from a design layout is presented. A 16-bit correlator, NPS CORN88, that was previously designed, was used as a vehicle to demonstrate this methodology. The study of the design and simulation tools, MAGIC and MOSSIM II, was the focus of the design and validation process. The design was then implemented and the chip was fabricated by MOSIS. This fabricated chip was then used to develop a testing methodology for using the digital test facilities at NPS. NPS CORN88 was the first full custom VLSI chip, designed at NPS, to be tested with the NPS digital analysis system, Tektronix DAS 9100 series tester. The capabilities and limitations of these test facilities are examined within this thesis. NPS CORN88 test results are included to demonstrate the capabilities of the digital test system. A translator, MOS2DAS, was developed to convert the MOSSIM II simulation program to the input files required by the DAS 9100 device verification software, 91DVS. Finally, a tutorial for using the digital test facilities, including the DAS 9100 and associated support equipments, is included as an appendix.
“An Engineering Methodology For Implementing And Testing VLSI Circuits” Metadata:
- Title: ➤ An Engineering Methodology For Implementing And Testing VLSI Circuits
- Author: Corliss, Walter F., II
- Language: English
“An Engineering Methodology For Implementing And Testing VLSI Circuits” Subjects and Themes:
- Subjects: VLSI - MAGIC - MOSSIM II - DVS50 - Digital test facilities
Edition Identifiers:
- Internet Archive ID: anengineeringmet1094527024
Downloads Information:
The book is available for download in "texts" format, the size of the file-s is: 1083.66 Mbs, the file-s for this book were downloaded 137 times, the file-s went public at Thu Nov 19 2020.
Available formats:
Abbyy GZ - Archive BitTorrent - DjVuTXT - Djvu XML - Item Tile - Metadata - OCR Page Index - OCR Search Text - Page Numbers JSON - Scandata - Single Page Processed JP2 ZIP - Text PDF - chOCR - hOCR -
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- Whefi.com: Download
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3An Engineering Methodology For Implementing And Testing VLSI Circuits
By Corliss, Walter F.
Thesis advisor: Loomis, Jr., Hershel H
“An Engineering Methodology For Implementing And Testing VLSI Circuits” Metadata:
- Title: ➤ An Engineering Methodology For Implementing And Testing VLSI Circuits
- Author: Corliss, Walter F.
- Language: en_US,eng
Edition Identifiers:
- Internet Archive ID: engineeringmetho00corlpdf
Downloads Information:
The book is available for download in "texts" format, the size of the file-s is: 102.45 Mbs, the file-s for this book were downloaded 137 times, the file-s went public at Fri Oct 09 2015.
Available formats:
Abbyy GZ - Animated GIF - Archive BitTorrent - DjVu - DjVuTXT - Djvu XML - Item Tile - Metadata - Scandata - Single Page Processed JP2 ZIP - Text PDF -
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4An Engineering Methodology For Implementing And Testing VLSI Circuits
By Corliss, Walter F.
Thesis advisor: Loomis, Jr., Hershel H
“An Engineering Methodology For Implementing And Testing VLSI Circuits” Metadata:
- Title: ➤ An Engineering Methodology For Implementing And Testing VLSI Circuits
- Author: Corliss, Walter F.
- Language: en_US
Edition Identifiers:
- Internet Archive ID: engineeringmetho00corl
Downloads Information:
The book is available for download in "texts" format, the size of the file-s is: 189.81 Mbs, the file-s for this book were downloaded 436 times, the file-s went public at Wed Oct 17 2012.
Available formats:
Abbyy GZ - Animated GIF - Archive BitTorrent - Cloth Cover Detection Log - Contents - DjVu - DjVuTXT - Djvu XML - Dublin Core - JPEG Thumb - MARC - MARC Binary - MARC Source - Metadata - OCR Page Index - OCR Search Text - Page Numbers JSON - Scandata - Single Page Original JP2 Tar - Single Page Processed JP2 ZIP - Text PDF - chOCR - hOCR -
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- Whefi.com: Download
- Whefi.com: Review - Coverage
- Internet Archive: Details
- Internet Archive Link: Downloads
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