Digital VLSI Chip Design with Cadence and Synopsys CAD Tools - Info and Reading Options
By Erik Brunvand
"Digital VLSI Chip Design with Cadence and Synopsys CAD Tools" was published by Pearson Education, Limited in 2009, it has 600 pages and the language of the book is English.
“Digital VLSI Chip Design with Cadence and Synopsys CAD Tools” Metadata:
- Title: ➤ Digital VLSI Chip Design with Cadence and Synopsys CAD Tools
- Author: Erik Brunvand
- Language: English
- Number of Pages: 600
- Publisher: Pearson Education, Limited
- Publish Date: 2009
“Digital VLSI Chip Design with Cadence and Synopsys CAD Tools” Subjects and Themes:
- Subjects: ➤ Integrated circuits, very large scale integration - Integrated circuits - Very large scale integration - Computer-aided design - Entwurfsautomation - VLSI
Edition Identifiers:
- The Open Library ID: OL29043882M - OL21449014W
- Online Computer Library Center (OCLC) ID: 308171006
- Library of Congress Control Number (LCCN): 2009419424
- ISBN-13: 9780321547996
- All ISBNs: 9780321547996
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