"Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics" - Information and Links:

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics - Info and Reading Options

Book's cover
The cover of “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” - Open Library.

"Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics" was published by Springer US in 2001 - Boston, MA, it has 112 pages and the language of the book is English.


“Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” Metadata:

  • Title: ➤  Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics
  • Author:
  • Language: English
  • Number of Pages: 112
  • Publisher: Springer US
  • Publish Date:
  • Publish Location: Boston, MA

“Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” Subjects and Themes:

Edition Specifications:

  • Format: [electronic resource] /
  • Pagination: ➤  1 online resource (xix, 112 p.)

Edition Identifiers:

AI-generated Review of “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics”:


"Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics" Description:

The Open Library:

This book was motivated by the problems being faced with shrinking IC process feature sizes. It is well known that as process feature sizes shrink, a host of electrical problems such as cross-talk, electromigration, self-heat, etc. become important. Cross-talk is one of the major problems since it results in unpredictable design behavior. In particular, it can result in significant delay variation or signal integrity problems in a wire, depending on the state of its neighboring wire. Typical approaches to tackling the cross-talk problem attempt to fix the problem once it is created. This book introduces a framework for cross-talk-free IC design. The main foundation of the book is the use of a predetermined layout pattern on the IC, which we call a `layout fabric'. The authors characterize this fabric and show how it yields cross-talk-immune designs. Two VLSI design flows are introduced which use the fabric concept. One flow is a minimally modified standard-cell based flow. The other flow uses a network of PLAs to implement the circuit. The authors also introduce `wire removal' techniques which improve circuit wire ability and thereby reduce circuit area. The new concepts presented here will be of interest to IC designers and researchers.

Read “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics”:

Read “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” by choosing from the options below.

Search for “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” downloads:

Visit our Downloads Search page to see if downloads are available.

Find “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” in Libraries Near You:

Read or borrow “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” from your local library.

Buy “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” online:

Shop for “Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics” on popular online marketplaces.



Find "Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics" in Wikipdedia